Briefly discuss SAT attack on logic locking. Also, describe the effect of a distinguishing input pattern (DIP) generated during the SAT attack. 1. What are the programmable resources within the FPGA...

Briefly discuss SAT attack on logic locking. Also, describe the effect of a distinguishing input pattern (DIP) generated during the SAT attack.

1. What are the programmable resources within the FPGA architecture that could be modified to enable bitstream obfuscation?