Consider 200 μm of n-type polysilicon, 0.25 μm wide and 1.0 μm in height. What is the optimum number of repeaters that will result in the minimum total delay? Assume the repeaters are CMOS inverters,...

Consider 200 μm of n-type polysilicon, 0.25 μm wide and 1.0 μm in height. What is the optimum number of repeaters that will result in the minimum total delay? Assume the repeaters are CMOS inverters, each with an unloaded propagation delay of 20 ps. The dielectric is SiO2, 1.5 μm thick.