Consider a rail-to-rail BiCMOS gate with a CMOS shunted output, as shown in Figure 11.26 and the device parameters provided in Table 11.4 through Table 11.6. For all n-MOSFETs, L N = 0.25 μm and W N =...

Consider a rail-to-rail BiCMOS gate with a CMOS shunted output, as shown in Figure 11.26 and the device parameters provided in Table 11.4 through Table 11.6. For all n-MOSFETs, L_N
= 0.25 μm and W_N
= 1 μm. For all p-MOSFETs, L_p
= 0.25 μm and W_p
= 2.5 μm.

1. Using SPICE, determine the propagation delays.

2. Using SPICE, apply a square wave input with a period equal to 10 times the average propagation delay, with a peak-to-peak amplitude of 5 V and a DC offset of 2.5 V. Determine and plot the slew rate (the slew rate is d_VOUT/d_t) vs. V_OUT
for the low-tohigh transition.

3. Repeat (2) for the high-to-low transition.

4. Discuss the variation of the slew rate and the practical implications.

Table 11.4

Figure 11.26