Consider Cu level-one interconnect, 0.5 μm wide and 1.0 μm high, on 1.5 μm of carbon-doped silicon dioxide. Estimate the ranges of length for which the following models are appropriate: a) the lumped capacitance model, b) the distributed rc model, and c) the transmission line model. For the CMOS driving gate, tp= CL(1 ps/fF).
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