Consider the BiCMOS and CMOS gates fabricated with the transistor parameters given in Table 11.4 through Table 11.6 and a supply voltage of VDD= 5 V. For all n-MOSFETs, LN= 0.25 μm and WN= 1 μm. For all p-MOSFETs, Lp= 0.25 μm and Wp= 2.5 μm. Determine the value of the load capacitance for which the BiCMOS and CMOS gates exhibit equal propagation delays.
Table 11.4
Table 11.6
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