Describe the different attacks on an FPGA bitstream, which could occur during field operation.
1. Consider the FPGA synthesized netlist with four LUTs and one flip-flop (Fig. 7.14). The corresponding configuration bits are provided in binary (consider the top bit as MSB). Reverse the design to its gate-level version.
2. Consider the FPGA-synthesized netlist referred to With the minimum possible modification of LUT contents, mount a bitstream tampering attack that permanently inverts the output from the original one, and draw the tampered netlist.
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