#include #include #include #include #include #include using namespace std; #define LABEL_SIZE 28 // our opcodes are nicely incremental enum OPCODES { ADD_OPCODE, SUB_OPCODE, AND_OPCODE, OR_OPCODE,...

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#include <stdio.h>
#include <fcntl.h>
#include <fstream>
#include <cstring>
#include <string>
#include <vector>
using namespace std;
#define LABEL_SIZE 28
// our opcodes are nicely incremental
enum OPCODES
{
ADD_OPCODE,
SUB_OPCODE,
AND_OPCODE,
OR_OPCODE,
XOR_OPCODE,
MOVE_OPCODE,
SHIFT_OPCODE,
BRANCH_OPCODE
};
// used to store label/address pairs so we can calculate branch addresses
struct BRANCH_POINT
{
// no need for 16 bits since we can't go more than 6 bits for an offset
unsigned char address;
char label[LABEL_SIZE];
};
typedef struct BRANCH_POINT BranchPoint;
// constants for our processor definition
#define WORD_SIZE 2
#define DATA_SIZE 1024*WORD_SIZE
#define CODE_SIZE 1024*WORD_SIZE
#define REGISTERS 16
// number of bytes to print on a line
#define LINE_LENGTH 16
// checks the hex value to ensure it a printable ASCII character. If
// it isn't, '.' is returned instead of itself
char valid_ascii( unsigned char hex_value )
{
if ( hex_value < 0x21 || hex_value > 0x7e )
hex_value = '.';

return (char)hex_value;
}
// takes the data and puts it into a file
void create_object_file( char *filename, unsigned char *data, int length )
{
FILE *object_file = NULL;
char object_filename[strlen(filename)];

// assumes that we have .asm at the end of each file name
strncpy( object_filename, filename, strlen(filename)-3 );
object_filename[strlen(filename)-3] = 'o';
object_filename[strlen(filename)-2] = '\0';

// create the new file
// doing RAW C here so I can do a straight binary write to the file
object_file = fopen( object_filename, "w+" );

// spit it out if we have a file to write to
if ( object_file )
{
fwrite( data, 1, length, object_file );

fclose( object_file );
}
}
// takes the data and prints it out in hexadecimal and ASCII form
void print_formatted_data( unsigned char *data, int length )
{
int i, j, k;
char the_text[LINE_LENGTH+1];

// print each line 1 at a time
for ( i=0 ; i<length ; i+=LINE_LENGTH )
{
printf( "%08x ", i );
// add 1 word at a time, but don't go beyond the end of the data
for ( j=0 ; j<LINE_LENGTH && (i+j)<length ; j+=2 )
{
the_text[j] = valid_ascii( data[i+j] );
the_text[j+1] = valid_ascii( data[i+j+1] );
printf( "%02x %02x ", data[i+j], data[i+j+1] );
}

// add in FFFF (invalid operation) to fill out the line
if ( (i+j) >= length )
{
for ( k=j ; k<LINE_LENGTH ; k+=2 )
{
the_text[k] = valid_ascii( 0xff );
the_text[k+1] = valid_ascii( 0xff );
printf( "ff ff " );
}
}

the_text[LINE_LENGTH] = '\0';
printf( " |%s|\n", the_text );
}
}
// returns the first 3 bits of the opcode corresponding to the given
// operation
unsigned char get_opcode( char *operation )
{
unsigned char opcode = '\0';

if ( strcmp( operation, "ADD" ) == 0 )
opcode = ADD_OPCODE;

else if ( strcmp( operation, "SUB" ) == 0 )
opcode = SUB_OPCODE;

else if ( strcmp( operation, "AND" ) == 0 )
opcode = AND_OPCODE;

else if ( strcmp( operation, "OR" ) == 0 )
opcode = OR_OPCODE;

else if ( strcmp( operation, "XOR" ) == 0 )
opcode = XOR_OPCODE;

else if ( strcmp( operation, "MOVE" ) == 0 )
opcode = MOVE_OPCODE;

else if ( strcmp( operation, "SRL" ) == 0 ||
strcmp( operation, "SRR" ) == 0 )
opcode = SHIFT_OPCODE;

else if ( strcmp( operation, "JR" ) == 0 ||
strcmp( operation, "BEQ" ) == 0 ||
strcmp( operation, "BNE" ) == 0 ||
strcmp( operation, "BLT" ) == 0 ||
strcmp( operation, "BGT" ) == 0 ||
strcmp( operation, "BLE" ) == 0 ||
strcmp( operation, "BGE" ) == 0 )
opcode = BRANCH_OPCODE;

return opcode;
}
// returns the type specifier for the given opcode and it's operands
// specifies the specific addressing mode or operation sub-type
unsigned char get_opcode_type( unsigned char opcode, char * operation,
char *operand1, char *operand2 )
{
unsigned char type = 0x00; // default/base settings

// arithmetic if on or before the XOR opcode
if ( opcode <= XOR_OPCODE )
{
// need to indicate if the 2nd operand is a register
if ( operand2[0] == 'R' )
type = 0x01;
}

else if ( opcode == MOVE_OPCODE )
{
// need to specify addressing mode

// handle destination being a memory locatoin
if ( operand1[0] == '[' )
{
type = 0x04;

// a register for a source is fine
if ( operand2[0] == 'R' )
type |= 0x01;

// but another memory location isn't
else if ( operand2[0] == '[' )
type |= 0x02;
}

// it's a register
else if ( operand1[0] == 'R' )
{
// memory for a source is fine
if ( operand2[0] == '[' )
type |= 0x01;

// but another register isn't
else if ( operand2[0] == 'R' )
type |= 0x02;
}

// it must be a literal, which isn't allowed
else
{
type |= 0x02;
}
}

else if ( opcode == SHIFT_OPCODE )
{
// indicate left or right shifting
if ( operation[2] == 'L' )
type = 0x01;
}

else if ( opcode == BRANCH_OPCODE )
{
// identify the branch based on the instruction
if ( strcmp( operation, "BEQ" ) == 0 )
type = 0x01;
else if ( strcmp( operation, "BNE" ) == 0 )
type = 0x02;
else if ( strcmp( operation, "BLT" ) == 0 )
type = 0x03;
else if ( strcmp( operation, "BGT" ) == 0 )
type = 0x04;
else if ( strcmp( operation, "BLE" ) == 0 )
type = 0x05;
else if ( strcmp( operation, "BGE" ) == 0 )
type = 0x06;
else if ( strcmp( operation, "BGE" ) == 0 )
type = 0x06;
else if ( strcmp( operation, "BGE" ) == 0 )
type = 0x06;
}

return type;
}
// extracts the register value from an operand
unsigned char get_register( char *operand )
{
int reg;

if ( operand[0] == 'R' )
sscanf( operand, "R%d", ® );
else
sscanf( operand, "[R%d]", ®);

return (unsigned char)reg;
}
// Goes through each branch and finds the appropriate label.
// Adjusts the last 6 bits of the instruction at the branch location
// with the address of the found label.
void fix_branches( unsigned char *machine_code,
vector<BranchPoint*> &labels,
vector<BranchPoint*> &branches )
{
int i,j;
bool found = false;
char offset;
unsigned char *instr;

// do each branch 1 at a time
for ( i=0 ; i<(int)branches.size() ; i++ )
{
// simple linear search for the label
found = false;
for ( j=0 ; j<(int)labels.size() && !found ; j++ )
Feb 09, 2021
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