Let us suppose, for the sake of simplicity, that each instruction on a RISC processor is processed in 2 microseconds and that an I/O device can only wait for an interrupt to be handled for a maximum...

Let us suppose, for the sake of simplicity, that each instruction on a RISC processor is processed in 2 microseconds and that an I/O device can only wait for an interrupt to be handled for a maximum of 1 millisecond before it is serviced.

When interruptions are turned off, the number of instructions that may be performed is limited.