Obtain commercially available enhancement type n-channel and p-channel MOSFETs for construction of the rail-to-rail BiCMOS inverter shown in Figure 11.20.
1. Using SPICE, determine the load capacitance, CL,100, for which the average propagation delay is 100 ns.
2. Build the inverter and apply the load capacitance determined in (1).
3. Apply a 2-MHz square wave input, with a peak to peak amplitude of 5 V and a DC offset of 2.5 V.
4. Measure and plot the slew rate (the slew rate is dVOUT/dt) vs. VOUTfor the low-to-high transition.
5. Repeat (4) for the high-to-low transition.
6. Discuss the variation of the slew rate and the practical implications.
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