Page 1 of 2 ELEC840 Project 2017 The project is concerned with the design of 16-point complex FFT processor using radix-2, Decimation-in-Time (DIT) butterfly architecture. The following Matlab...



The project consists of two parts:



Part A


(i) Design and implement a 16-point radix DIT complex FFT in Matlab using commplex variables, exp(-j*x) for twiddle factor WN calculations(e.g. no storage for the twiddle factors is required), and one or more 16-element arrays for the data memory.Assume that all the input time domain data values are available in a 16-element array to start with. Inputs and outputs are all complex values.




Page 1 of 2 ELEC840 Project 2017 The project is concerned with the design of 16-point complex FFT processor using radix-2, Decimation-in-Time (DIT) butterfly architecture. The following Matlab functions are provided to you to use in the project: res_analysis and QuantizeELEC840. The project consists of two parts: Part A (i) Design and implement a 16-point radix-2 DIT complex FFT in Matlab using complex variables, exp(–j*x) for twiddle factor WN calculations (e.g. no storage for the twiddle factors is required), and one or more 16-element arrays for the data memory. Assume that all the input time domain data values are available in a 16-element array to start with. Inputs and outputs are all complex values. (ii) Show that your FFT correctly calculates an FFT for a random input, Din, by comparing it in Matlab using input signal: >>Din = (1.99*rand(1,16)-1) + j*(1.99*rand(1,16)-1); and: >>res_analysis(fft(Din)*Scale, YourFFTOutput); where Scale is a real valued constant specific to your design and YourFFTOutput is the output of your FFT implementation. Submit as part of your report: (1) 16-Point, radix-2, DIT FFT Signal Flow Graph (SFG) showing butterflies for each stage and their associated data input/output locations and twiddle factors. (2) Block diagram representing your scaled butterfly and overall FFT processor implementation. (3) res_analysis() plot and res_analysis() text output (4) Your Matlab code. Part B (i) Repeat the requirements in Part A but now the input, output, and all values between stages must be 16-bit values with valid ranges matching 16-bit 2's complement numbers. Convergent Round extra bits from wide numbers at the end of each butterfly computation. The twiddle factor WN are also quantised to 16-bit 2’s complement numbers. To achieve this, use the QuantizeELEC840 Matlab function provided to you. [Bear in mind that ELEC840 Project 2017 Page 2 of 2 QuantizeELEC840 function only deals with the fractional part of the input not the integer part] (ii) State the [x.y] number format for the input, output, and all values between stages as well as the twiddle factors. Where, x represents the number of integers bits and y the number of fractional bits. (iii) Repeat Part A (ii) and demonstrate the effect of data and coefficient quantisation on the output of your implemented FFT processor. Submit as part of your report: (5) Block diagram representing your quantised butterfly and overall FFT implementation showing where the quantization and scaling taking place. (6) res_analysis() plot and res_analysis() text output (7) Your Matlab code.
Oct 25, 2019ELEC840
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