QuizThe pipeline diagram shows when each instruction will be in each stage of the pipeline. In this diagram, each row represents a cycle and each column represents a different pipeline stage. All...

1 answer below »
please make sure the expert gets it right because I'm losing points on assignments






Quiz The pipeline diagram shows when each instruction will be in each stage of the pipeline. In this diagram, each row represents a cycle and each column represents a different pipeline stage. All instructions go through the IF and ID stages. Integer instructions go through the EX, MEM, and WB stages. Floating-point load instructions go through EX, MEM, and FWB stages. Floating-point add and subtract operations go through the FADD and FWB stages, do not go through MEM stage, and require 4 cycles during execution. Store instructions do not perform a write-back stage. 1. fadd  f4,f0,f2 2. lw      x3,0(x1) 3. add   x4,x4,x3 4. sw      x4,0(x1) 5. addi   x1,x1,-8 cycle IF ID EX MEM WB FADD FWB 1 1 2 2 1 3 3 2 1 4 4 3 2 1 5 stall stall 2 1 6 5 4 3 2 1 7 5 4 3 1 8 5 4 3 9 5 10 5 2-What sector would the byte offset 18,416 belong to? 3-What sector would the byte offset 5,564 belong to? 4-Which of the following are components of a block request? (select all that apply) header data status rate interrupt # 5-Writing to a block device request requires that the header block request type be which of the following? VIRTIO_BLK_T_WRITE VIRTIO_BLK_T_READ VIRTIO_BLK_T_IN VIRTIO_BLK_T_OUT VIRTIO_BLK_T_FLUSH 6-To chain descriptors together, which of the following flags must be set? VIRTQ_DESC_F_DATA VIRTQ_DESC_F_WRITE VIRTQ_DESC_F_CHAIN VIRTQ_DESC_F_NEXT 7-When a block request is finished, which of the following notifies your OS that it is done? it generates an interrupt the status field changes the used index changes the memory address changes 8-How many virtio descriptors are required for one block request? 0 1 2 3 4 5 6 7 8 9-How many virtio driver ring elements are required for one block request? 0 1 2 3 4 5 6 7 8 10-Combining several block requests into a single request is best known as which of the following? disk merging disk scheduling request chaining request merging 11-Which of the following are possible values for the status field after a request has been serviced? (select all that apply) VIRTIO_BLK_T_IN VIRTIO_BLK_T_OUT VIRTIO_BLK_S_IOERR VIRTIO_BLK_S_UNSUPP VIRTIO_BLK_T_DISCARD VIRTIO_BLK_S_OK VIRTIO_BLK_T_FLUSH 12- 13-All command packets begin with which of the following? start header control flags GPU header context header command header control header 14- 15-Which of the following commands must be used to update the GPU output? (select all that apply) VIRTIO_GPU_CMD_RESOURCE_FLUSH VIRTIO_GPU_CMD_RESOURCE_CREATE_2D VIRTIO_GPU_RESP_OK_DISPLAY_INFO VIRTIO_GPU_CMD_SET_SCANOUT VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING 16-Which of the following commands must be used if the GPU interrupts you because the GPU window dimensions have changed? (select all that apply) VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING VIRTIO_GPU_CMD_RESOURCE_FLUSH VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D VIRTIO_GPU_CMD_RESOURCE_CREATE_2D VIRTIO_GPU_CMD_SET_SCANOUT 17-The R8G8B8A8_UNORM format requires how many bytes per pixel? 1 2 4 8 16 32 64 128 256 18-The GPU will interrupt via the PLIC if which of the following occurs? (select all that apply) the driver ring has been serviced by the device. the mouse cursor moves over the GPU window. keyboard input is made while the GPU window is focused. the GPU's framebuffer dimensions have changed. 19- If an interrupt occurs because the GPU window dimensions have changed, the device ring index will have been incremented. True False 20-The GPU, unlike some other virtio devices, requires the notify register to be written-to in order to "react" to a command. True False 21How many bytes in RAM must be allocated for a framebuffer of dimensions 1,699x1,096 using pixel format B8G8R8A8_UNORM?
Answered 5 days AfterOct 26, 2022

Answer To: QuizThe pipeline diagram shows when each instruction will be in each stage of the pipeline. In...

Jahir Abbas answered on Oct 31 2022
46 Votes
Sector No. = (18416 / 512 ) + 1 = 37
Similarly (5564 / 512) +1 = 12(Round off)
data
Virtio_Blk_T
_Write
Virtio_Blk_T_Read
Virto_Desc_F_Write
The memory address changes
3
3
Request merging
Virtio_Blk_S_Ok
Comman...
SOLUTION.PDF

Answer To This Question Is Available To Download

Related Questions & Answers

More Questions »

Submit New Assignment

Copy and Paste Your Assignment Here