Problem 2.4.1 Combinational Logic Circuit Design: Date of Birth Introduction Your date of birth may make you unique in your class, but possibly not as unique as you think. With a worldwide birthrate...



Problem 2.4.1 Combinational Logic Circuit Design: Date of Birth


Introduction


Your date of birth may make you unique in your class, but possibly not as unique as you think. With a worldwide birthrate of roughly 130 million per year, this means that on a daily basis, over 360,000 individuals may share the same date of birth (assuming births are distributed evenly across 365 days).


In a digital electronics classroom of 20 students, there is less than a 50% probability that two of you share the same date of birth. However, in a class larger than 23 students, the odds are greater than 50% that two people might share the same birthday. For more information about probabilities and birthdays, research “the birthday paradox”.


In this activity, you are going to design a circuit that will display your (hopefully unique) date of birth on a single, seven-segment display. This design will bring together all of the design techniques that you have learned throughout this lesson.



Equipment


· Breadboard (DMS or DLB)


· #22 Gauge solid wire


· Integrated Circuits:


o 74LS00


o 74LS02


o 74LS04


o 74LS08


o 74LS10


o 74LS11


o 74LS27


o 74LS32


· Common Cathode Seven-Segment Display (on DMS or DLB)


· Circuit Design Software (CDS)



Procedure


Design


1. Design a combinational logic circuit that has three inputs and seven outputs. When the inputs (X, Y, and Z) create a count from 000 to 111, the seven outputs (a through g) generate the logic required to display your date of birth on a seven-segment display.




The date of birth will be displayed in the MM-DD-YY format. For example, if you were born on May 12, 1993, your design will display 05-12-93.


2. Detailed Design Specifications:


· The seven-segment display must be a common cathode.


· Current limiting resistors (150 W - 270W) must be used.


· The Karnaugh mapping technique must be used to obtain the simplified logic expression for each of the seven segments.


· At least one segment must be implemented with NAND only logic.


· At least one segment must be implemented with NOR only logic.


· The implementation of the remaining segments is left to your discretion.



Simulation


3. Using the Circuit Design Software (CDS), enter and test your Date of Birth design.


a. Use switches for the inputs X, Y, and Z.


b. Verify that the circuit is working as designed.


c. If the circuit is not working properly, review your design work and circuit implementation to identify your mistake. Make any necessary corrections and retest.


d. Be sure to document all changes in your engineering notebook/portfolio.



Prototyping


4. Using the Digital Logic Board (DLB), build and test your Date of Birth design.


a. Verify that the circuit is working as designed. If it is not, do not change your design. You know that your design is good, because you simulated it. If your circuit isn’t working correctly, you must have built something incorrectly.


b. Review your circuit implementation to identify your mistakes, make the necessary corrections, and retest.


c. Be sure to document all changes in your engineering notebook.



Conclusion


Using your engineering notebook/portfolio as a guide, write a conclusion (minimum 250 words) that describes the process that you used to design, simulate, and build your Date of Birth circuit. This conclusion must include all of your design work (such as truth table, K-Maps), preliminary and final schematics, parts list, and a digital photograph of your final circuit. The documentation should be complete enough that another student with the same knowledge of digital electronics could reproduce your design without any additional assistance.

Mar 01, 2021
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