What is the size of the biggest capacitor that can be driven by a circuit that implements the logic below has 2.4ns delay, including intrinsic delay uses five stages? (logic should be distributed...

What is the size of the biggest capacitor that can be driven by a circuit that implements the logic below has 2.4ns delay, including intrinsic delay uses five stages? (logic should be distributed ideally) Incremental delay for the process is 100ps. Intrinsic delay= 50ps What is the size of the biggest capacitor that can be driven by a circuit that implements the logic below has 2.4ns delay, including intrinsic delay uses five stages? (logic should be distributed ideally) Incremental delay for the process is 100ps. Intrinsic delay= 50ps