Objective: In this project, you will build the following gates. The marks allotted to each circuit are shown as well. RAM 64 [2.0 marks] RAM512 [2.0 marks] PC [2.0 marks] 1. For further help check...

solution/PC.hdl
// This file is part of www.nand2tetris.org
/**
* 16-bit counter with load and reset controls.
*
* If reset(t-1) then out(t) = 0
* else if load(t-1) then out(t) = in(t-1)
* else if inc(t-1) then out(t) = out(t-1) + 1 (integer addition)
* else out(t) = out(t-1)
*/
CHIP PC {
IN in[16],load,inc,reset;
OUT out[16];
PARTS:
    Inc16(in=regout, out=plusone);
    Mux16(a=false, b=plusone, sel=inc, out=incout);
    Mux16(a=incout, b=in, sel=load, out=loadout);
    Mux16(a=loadout, b=false, sel=reset, out=toload);
    Or(a=load, b=reset, out=loadorreset);
    Or(a=loadorreset, b=inc, out=loadflag);
Register(in=toload, load=loadflag, out=regout);
    Or16(a=regout, b=regout, out=out);
}
solution/PC.tst
// This file is part of www.nand2tetris.org
load PC.hdl,
output-file PC.out,
compare-to PC.cmp,
output-list time%S1.4.1 in%D1.6.1 reset%B2.1.2 load%B2.1.2 inc%B2.1.2 out%D1.6.1;
set in 0,
set reset 0,
set load 0,
set inc 0,
tick,
output;
tock,
output;
set inc 1,
tick,
output;
tock,
output;
set in -32123,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set load 0,
tick,
output;
tock,
output;
tick,
output;
tock,
output;
set in 12345,
set load 1,
set inc 0,
tick,
output;
tock,
output;
set reset 1,
tick,
output;
tock,
output;
set reset 0,
set inc 1,
tick,
output;
tock,
output;
set reset 1,
tick,
output;
tock,
output;
set reset 0,
set load 0,
tick,
output;
tock,
output;
set reset 1,
tick,
output;
tock,
output;
set in 0,
set reset 0,
set load 1,
tick,
output;
tock,
output;
set load 0,
set inc 1,
tick,
output;
tock,
output;
set in 22222,
set reset 1,
set inc 0,
tick,
output;
tock,
output;
solution/RAM512.hdl
// This file is part of www.nand2tetris.org
/**
* Memory of 512 registers, each 16-bit wide.
* The chip facilitates read and write operations, as follows:
* Read: out(t) = RAM512[address(t)](t)
* Write: If load(t-1) then RAM512[address(t-1)](t) = in(t-1)
* In words: the chip always outputs the value stored at the memory
* location specified by address. If load == 1, the in value is loaded
* into the memory location specified by address. This value becomes
* available through the out output starting from the next time step.
*/
CHIP RAM512 {
IN in[16], load, address[9];
OUT out[16];
PARTS:
    DMux8Way(in=load, sel=address[6..8], a=loada, b=loadb, c=loadc, d=loadd, e=loade, f=loadf, g=loadg, h=loadh);
    RAM64(in=in, load=loada, address=address[0..5], out=outa);
    RAM64(in=in, load=loadb, address=address[0..5], out=outb);
    RAM64(in=in, load=loadc, address=address[0..5], out=outc);
    RAM64(in=in, load=loadd, address=address[0..5], out=outd);
    RAM64(in=in, load=loade, address=address[0..5], out=oute);
    RAM64(in=in, load=loadf, address=address[0..5], out=outf);
    RAM64(in=in, load=loadg, address=address[0..5], out=outg);
    RAM64(in=in, load=loadh, address=address[0..5], out=outh);
    Mux8Way16(a=outa, b=outb, c=outc, d=outd, e=oute, f=outf, g=outg, h=outh, sel=address[6..8], out=out);    
}
solution/RAM512.tst
/ This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM512.tst
load RAM512.hdl,
output-file RAM512.out,
compare-to RAM512.cmp,
output-list time%S1.4.1 in%D1.6.1 load%B2.1.2 address%D2.3.2 out%D1.6.1;
set in 0,
set load 0,
set address 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in 13099,
set load 0,
tick,
output;
tock,
output;
set load 1,
set address 130,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set in 4729,
set address 472,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set load 0,
tick,
output;
tock,
output;
set address 130,
eval,
output;
set in 5119,
tick,
output;
tock,
output;
set load 1,
set address 511,
tick,
output;
tock,
output;
set load 0,
tick,
output;
tock,
output;
set address 472,
eval,
output;
set address 511,
eval,
output;
set load 0,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
eval,
output;
set address %B010101010,
eval,
output;
set address %B010101011,
eval,
output;
set address %B010101100,
eval,
output;
set address %B010101101,
eval,
output;
set address %B010101110,
eval,
output;
set address %B010101111,
eval,
output;
set load 1,
set in %B0101010101010101,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
tick,
output,
tock,
output;
set address %B010101010,
tick,
output,
tock,
output;
set address %B010101011,
tick,
output,
tock,
output;
set address %B010101100,
tick,
output,
tock,
output;
set address %B010101101,
tick,
output,
tock,
output;
set address %B010101110,
tick,
output,
tock,
output;
set address %B010101111,
tick,
output,
tock,
output;
set load 0,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
eval,
output;
set address %B010101010,
eval,
output;
set address %B010101011,
eval,
output;
set address %B010101100,
eval,
output;
set address %B010101101,
eval,
output;
set address %B010101110,
eval,
output;
set address %B010101111,
eval,
output;
set load 1,
set address %B010101000,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
eval,
output;
set address %B010101010,
eval,
output;
set address %B010101011,
eval,
output;
set address %B010101100,
eval,
output;
set address %B010101101,
eval,
output;
set address %B010101110,
eval,
output;
set address %B010101111,
eval,
output;
set load 1,
set address %B010101000,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address %B010101001,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
eval,
output;
set address %B010101010,
eval,
output;
set address %B010101011,
eval,
output;
set address %B010101100,
eval,
output;
set address %B010101101,
eval,
output;
set address %B010101110,
eval,
output;
set address %B010101111,
eval,
output;
set load 1,
set address %B010101001,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address %B010101010,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
eval,
output;
set address %B010101010,
eval,
output;
set address %B010101011,
eval,
output;
set address %B010101100,
eval,
output;
set address %B010101101,
eval,
output;
set address %B010101110,
eval,
output;
set address %B010101111,
eval,
output;
set load 1,
set address %B010101010,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address %B010101011,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
eval,
output;
set address %B010101010,
eval,
output;
set address %B010101011,
eval,
output;
set address %B010101100,
eval,
output;
set address %B010101101,
eval,
output;
set address %B010101110,
eval,
output;
set address %B010101111,
eval,
output;
set load 1,
set address %B010101011,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address %B010101100,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
eval,
output;
set address %B010101010,
eval,
output;
set address %B010101011,
eval,
output;
set address %B010101100,
eval,
output;
set address %B010101101,
eval,
output;
set address %B010101110,
eval,
output;
set address %B010101111,
eval,
output;
set load 1,
set address %B010101100,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address %B010101101,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
eval,
output;
set address %B010101010,
eval,
output;
set address %B010101011,
eval,
output;
set address %B010101100,
eval,
output;
set address %B010101101,
eval,
output;
set address %B010101110,
eval,
output;
set address %B010101111,
eval,
output;
set load 1,
set address %B010101101,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address %B010101110,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address %B010101000,
tick,
output;
tock,
output;
set address %B010101001,
eval,
output;
set address %B010101010,
eval,
output;
set address...