T → 1 . Sketch the input/output relationship for 0 where Vout = 0V for 0, and Vout = 1.8V for I Vin 1.3 Given the system in problem 1.2, state the bit that is mapped to from each voltage. (a) 0.1V (b)...

T → 1 . Sketch the input/output relationship for 0 where Vout = 0V for 0, and Vout = 1.8V for I Vin 1.3 Given the system in problem 1.2, state the bit that is mapped to from each voltage. (a) 0.1V (b) 1.73267589V (c) 0.99V (d) 1.01V 1.4 Given the system in problem 1.2, state how much analog voltage noise can be tolerated on both the low and high logic levels." aria-describedby="d34"> 1.2 Given a digital system with VDD = 1.8V, and an analog-to-digital threshold T = 1.0V such 1.8V that x <> T → 1 . Sketch the input/output relationship for 0 where Vout = 0V for '0, and Vout = 1.8V for "I' Vin 1.3 Given the system in problem 1.2, state the bit that is mapped to from each voltage. (a) 0.1V (b) 1.73267589V (c) 0.99V (d) 1.01V 1.4 Given the system in problem 1.2, state how much analog voltage noise can be tolerated on both the low and high logic levels.